Codenamed Skylake, the 6th generation processor family was introduced on 5th August at Gamescom 2015, when Intel officially launched their Z170 platform and kicked off the Skylake family with two unlocked processors, the Core i7-6700K and Core i5-6600K. Today, Intel has unwrapped entire architectural details involving their 6th generation Skylake processors.
Intel’s latest System-on-Chip (SoC) microarchitecture, code name Skylake. It is built on Intel’s leading 14nm process technology. This “tock” microarchitecture was completely redesigned to bring new IPs and integrations, great performance and reduced power consumption. via Intel
The Skylake chips feature Intel Gen9 integrated graphics which not only offer more graphics compute performance, but consume less power while doing it. The details Intel provides on their Skylake iGPUs include a block diagram for their Core i7-6700K processor which launched earlier this month as the flagship offering on the Z170 platform.
Intel Skylake Gen9 Graphics Features:
Gen9 Memory Hierarchy Refinements:
- Coherent SVM write performance is significantly improved via new LLC cache management policies.
- The available L3 cache capacity has been increased to 768 Kbytes per slice (512 Kbytes for application data).
- The sizes of both L3 and LLC request queues have been increased. This improves latency hiding to achieve better effective bandwidth against the architecture peak theoretical.
- In Gen9 EDRAM now acts as a memory-side cache between LLC and DRAM. Also, the EDRAM memory controller has moved into the system agent, adjacent to the display controller, to support power efficient and low latency display refresh.
- Texture samplers now natively support an NV12 YUV format for improved surface sharing between compute APIs and media fixed function units.
Gen9 Compute Capability Refinements:
- Preemption of compute applications is now supported at a thread level, meaning that compute threads can be preempted (and later resumed) midway through their execution.
- Round robin scheduling of threads within an execution unit.
- Gen9 adds new native support for the 32-bit float atomics operations of min, max, and compare/exchange. Also the performance of all 32-bit atomics is improved for kernel scenarios that issued multiple atomics back to back.
- 16-bit floating point capability is improved with native support for denormals and gradual underflow.
Gen9 Product Configuration Flexibility:
- Gen9 has been designed to enable products with 1, 2 or 3 slices.
- Gen9 adds new power gating and clock domains for more efficient dynamic power management. This can particularly improve low power media playback modes.
Skylake chips add support for DirectX 12, OpenCL 2.0, and OpenGL 4.4 and include native support for decoding and encoding HEVC, VP8, and MJPEG videos. There’s also a new QuickSync video mode that supports real-time, low-power video encoding. Intel has added new RAW image processing support, enabling support for shooting RAW video at 4K resolutions at up to 60 frames per second. Skylake Gen9 display pipe support and max resolution 4096×2304 [email protected]
Source: wccftech and liliputing
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