Amlogic S912 and Amlogic S905X Processor Specifications
In mid-March we wrote about Amlogic 2016 Roadmap for new processors. Today we uncover more information and specification for Amlogic S905X and Amlogic S912.
Amlogic S905X is an advanced application processor designed for OTT/IP Set Top Box (STB) and high-end media box applications. It integrates a powerful CPU/GPU subsystem, a secured 4K video CODEC engine and a best-in-class HDR image processing pipeline with all major peripherals to form the ultimate low power multimedia AP.
The main system CPU is a quad-core ARM Cortex-A53 CPU with L1 instruction/data cache for each core and a large unified L2 cache to improve system performance. In addition, the Cortex-A53 CPU includes the NEON SIMD co-processor to improve software media processing capability. The quad-core ARM Cortex-A53 CPU can be overdriven to 2GHz and has a wide bus connecting to the memory sub-system.
The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The five core ARM Mali-450 GPU including dual geometry processors (GP) and triple pixel processors (PP).The multi-core GPU processor handles all OpenGL ES 1.1/2.0 and OpenVG graphics programs, while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. Together, the CPU and GPU handle all operating system, networking, user-interface and gaming related tasks. The video output pipeline includes advanced HDR10 and HLG HDR processing, REC709/BT2020 processing, motion adaptive edge enhancing de-interlacing, flexible programmable scalar, and many picture enhancement filters before passing the enhanced image to the video output ports.
Amlogic Video Engine (AVE-10) offloads the Cortex-A53 CPUs from all video CODEC processing. It includes dedicated hardware video decoder and encoder. AVE-10 is capable of decoding 4Kx2K resolution video at 60fps with complete Trusted Video Path (TVP) for secure applications and supports full formats including MVC, MPEG-1/2/4, VC-1/WMV, AVS, AVS+, RealVideo, MJPEG streams, H.264, H265-10, VP9-10 and also JPEG pictures with no size limitation. The independent encoder is able to encode in JPEG or H.264 up to 1080p at 60fps.
Amlogic S905X integrates all standard audio/video input/output interfaces including a HDMI2.0a transmitter with 3D, HDR, CEC and HDCP 2.2 support, stereo audio DAC, a CVBS output, PCM, I2S and SPDIF digital audio input/output interfaces, and a stereo PDM digital MIC inputs.
The processor has rich advanced network and peripheral interfaces, including a 10/100M Ethernet MAC with FE PHY interface, dual USB 2.0 high-speed ports (one OTG and one HOST) and multiple SDIO/SD card controllers, UART, I2C, high-speed SPI and PWMs. Standard development environment utilizing GNU/GCC Android tool chain is supported. The Amlogic S905X SoC is a good solution for Android TV Box.
Amlogic S912 specifications with highlights in bold showing differences with Amlogic S905X:
- CPU Sub-system – Octa core ARM Cortex-A53 CPU up to 2 GHz (DVFS) with two CPU clusters one optimized for high performance (big) and the other for low power (LITTLE)
- 3D Graphics Processing Unit –ARM Mali-T820MP3 GPU up to 750MHz (DVFS) with 3 shader engines supporting OpenGL ES 1.1/2.03.1, DirectX 11 FL9_3, OpenCL 1.1/1.2 full profile and RenderScript.
- 2.5D Graphics Processor – Fast bitblt engine with dual inputs and single output, programmable raster operations (ROP) and polyphase scaling filter, etc..
- Crypto Engine – AES/AES-XTS block cipher with 128/192/256 bits keys, DES/TDES block cipher, hardware crypto key-ladder operation and DVB-CSA for transport stream encryption, built-in hardware True Random Number Generator (TRNG), CRC and SHA-1/SHA-2/HMAC SHA engine
- Video/Picture CODEC
- Amlogic Video Engine (AVE-10) with dedicated hardware decoders and encoders
- Supports multiple “secured” video decoding sessions and simultaneous decoding and encoding
- Video/Picture Decoding
- VP9-10 Profile-2 up to [email protected]
- H.265 HEVC [email protected] up to [email protected]
- H.264 AVC [email protected] up to [email protected], H.264 MVC up to 1080p @60fps
- MPEG-4 [email protected] up to [email protected] (ISO-14496)
- WMV/VC-1 SP/MP/AP up to [email protected]
- AVS-P16(AVS+) /AVS-P2 JiZhun Profile up to [email protected]
- MPEG-2 MP/HL up to [email protected] (ISO-13818)
- MPEG-1 MP/HL up to [email protected] (ISO-11172)
- RealVideo 8/9/10 up to [email protected]
- WebM up to VGA
- MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
- Supports JPEG thumbnail, scaling, rotation and transition effects
- Video/Picture Encoding
- Independent JPEG and H.264 encoder with configurable performance/bit-rate
- JPEG image encoding
- H.264 video encoding up to [email protected] with low latency
- Video Post-Processing Engine – Dolby Vision, HDR10 and HLG HDR processing, motion adaptive 3D noise reduction filter, advanced motion adaptive edge enhancing de-interlacing engine, 3:2 pull-down support, deblocking filters, etc..
- Video Output
- Built-in HDMI 2.0a transmitter including both controller and PHY with 3D, CEC, HDR and HDCP 2.2, [email protected] max resolution output
- CVBS 480i/576i standard definition output
- RGB888 TTL interface up to 1920×1080
- Camera Interface – ITU 601/656 parallel video input with down-scalar, supports camera input as YUV422, RGB565,16bit RGB or JPEG
- Audio Decoder and Input/Output
- Supports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 7.1/5.1 down-mixing
- I2S audio interface supporting 8-channel (7.1) input and output
- Built-in serial digital audio SPDIF/IEC958 output and PCM input/output
- Built-in stereo audio DAC
- Dual-channel digital microphone PDM input
- Supports concurrent dual audio stereo channel output with combination of analog+PCM or I2S+PCM
- Memory and Storage Interface
- 16/32-bit SDRAM memory interface running up to DDR2400
- Supports up to 2GB DDR3/4, DDR3L, LPDDR2, LPDDR3 with dual ranks
- Supports SLC/MLC/TLC NAND Flash with 60-bit ECC
- SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting up to UHS-I SDR104
- eMMC and MMC card interface with 1/4/8-bit data bus width fully supporting spec version 5.0 HS400
- Supports serial 1, 2 or 4-bit NOR Flash via SPI interface
- Built-in 4k bits One-Time-Programming memory for key storage (That must be where DRM / HDCP keys are programmed)
- Integrated IEEE 802.3 10/100/1000M Gigabit Ethernet MAC controller with RGMII interface
- Integrated 10/100M PHY interface
- Supports Energy Efficiency Ethernet (EEE) mode
- Digital Television Interface
- Transport stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator and one output TS interface
- Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
- Integrated CI+ port and ISO 7816 smart card controller
- Integrated I/O Controllers and Interfaces
- 3x USB 2.0 high-speed USB I/O, 2x USB Host and one USB OTG
- Multiple UART, I2C and SPI interface with slave select
- Multiple PWMs
- Programmable IR remote input/output controllers
- Built-in 10bit SAR ADC with 2 input channels
- General Purpose IOs with built-in pull up and pull down
- System, Peripherals and Misc. Interfaces
- Integrated general purpose timers, counters, DMA controllers
- 24 MHz crystal input
- Embedded debug interface using ICE/JTAG
- Power Management
- Multiple external power domains controlled by PMIC, and internal ones controlled by software
- Multiple sleep modes for CPU, system, DRAM, etc.
- Multiple internal PLLs for DVFS operation
- Multi-voltage I/O design for 1.8V and 3.3V
- Power management auxiliary processor in a dedicated always-on (AO) power domain that can communicate with an external PMIC
- Trustzone based Trusted Execution Environment (TEE)
- Secured boot, encrypted OTP, encrypted DRAM with memory integrity checker, hardware key ladder and internal control buses and storage
- Protected memory regions and electric fence data partition
- Hardware based Trusted Video Path (TVP) , video watermarking and secured contents (requires SecureOS software)
- Secured IO and secured clock
- Package – LFBGA 15 x 15 mm, 0.65 ball pitch, RoHS compliant
All of the new chips that will appear in Q1 (Amlogic S905X) and Q2 2016 (Amlogic S912) will have four to eight ARM Cortex A53 cores and Android 6.0.